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sap1
- 這是用verilog寫的一個簡單的處理器，雖然只具有5個指令，但是可以透過這個範例，來了解到cpu的架構，與如何開發處理器，相信會有很大的啟發。-using Verilog This is a simple written by the processor, although with only five directives, through this example, to understand cpu architecture, how to develop processor, it w
ARMCORE
- 用verilog语言实现的ARM7处理器的标准内核的源代码程序,nnARM, 具有很好的参考价值-using Verilog language of the standard ARM7 processor core source code procedures nnARM, who have a good reference value
b16
- 一个verilog实现的16位堆栈型处理器，实现了32条指令，fpga实现频率为26Mhz！-Verilog implementation of a 16-bit stack-based processor to realize the 32 instructions, fpga implementation frequency of 26Mhz!
verilog_uart
- 介绍了如何用verilog语言实现处理器部件uart-Describes how to use Verilog language processor components UART
FPGA_jiaocheng_yu_shiyan
- 最重要的是七个从简单到复杂的实验，包括：基础实验一_FPGA_LED 基础实验二_seg7实验以及仿真 基础实验三_SOPC_LED 基础实验四_Flash烧写 基础实验五_定时器实验 基础实验六_按键以及PIO口中断实验 实验七_网卡使用 ，这些实验室用到了SOPC BUILDER 与NOIS ii ,使用Verilog 编写，有实验板和没有实验板的都可以用来学习。 其次还包括： FPGA开发板各存储器之间的联系、 多处理器文档 、 USB_UART等文档，很好用的文档，您下了相信不会后悔！-
ddpi_rx
- 描写处理器与FPGA之间的接口程序，使用verilog语言编写-Describes the interface between the processor and the FPGA program, using the verilog language
MIPS1CYCLE
- MIPS single-cycle processor design in verilog.Instruction memory to the design and initialise it with your assembly code-a. Load the data stored in the X and Y locations of the data memory into the X and Y registers. b. Add the X and Y registers an
verilog_processor
- it is small processor written in verilog.
singlecircle_cpu
- 实现十一条指令的单周期处理器，运用Verilog语言，顺利执行，仿真正确。-To achieve single-cycle instruction processor XI, the use of Verilog language, the successful implementation of the simulation is correct.
ADSP2100
- ADSP2100的Verilog源代码，可综合。ADSP2100是用的相当广泛的3款DSP架构之一，现在不太流行了，不过其架构相当精巧，和现在的处理器风格迥异，有兴趣的朋友可以看一下。-ADSP2100 the Verilog source code can be integrated. ADSP2100 is used in a wide range of 3, one of DSP architecture, it is less popular, but its structure rat
Alpha
- 一款Alpha指令集的超标量处理器的Verilog源码，是学习乱序处理器的难得资料。-A superscalar Alpha processor instruction set of the Verilog source code for a processor to learn valuable information out of order.
spi-verilog
- 用Verilog来实现SPI接口电路逻辑，实现主机与从处理器的通信-SPI interface circuit is implemented in Verilog logic between master and slave processor communication
processor-vhdl
- 包内有dsp320vc33，dsp6211，dsp6415，dsp6713,hc11_core(附加Verilog代码),p89c51,std8980,zr36060的源码-Dsp320vc33 dsp6211 dsp6415, dsp6713 hc11_core (additional Verilog code), P89C51 std8980 ZR36060 the source package
risc-4-way-lru-processor-verilog
- A RISC processor written in verilog codes.
CISC-Processor-MOdule-Verilog
- Cisc Processor For Se-Cisc Processor For Sell
CISC-Processor-MOdule-Verilog
- Cisc Processor For Se-Cisc Processor For Sell
FPGA-IMPLEMENTATION-OF-AN-AES-PROCESSOR
- Advanced Encryption Standard(AES) implementing in a faster and secured way is expected. AES can be implemented in software/hardware. In hardware implementation ASIC solution requires high cost and much design time while FPGA based implementation
8051-master
- 设计兼容51的指令集的处理器架构 编写兼容51处理器的Verilog代码 仿真 验证测试处理器的功能和性能(The design includes a processor whose instruction set is compatible to the industrial standard 8051 and its FPGA implementation. Through the analysis of instructions, I determine the CPU inte
chapter_listing
- Embedded SoPC Design with Nios II Processor and Verilog Examples
buffer
- Hi iam Ramana a research scholar,doing my phd from sathyabama university. Title: Designa video codec h.264 processor using verilog hdl. i request you to send video codec H.264 on Verilog hdl. regards D Ramana, M.Tech(Ph.D) SATHYABAMA